| 1. | A pulse to gate the output of a core memory sense amplifier into a trigger in a register
一种只读存储器，其中的内容可以擦除，使存储器成为空白状态。 |
| 2. | A pulse to gate the output of a core memory sense amplifier into a trigger in a register
将磁心存储器读出放大器的输出选通到寄存器的触发器中的一种脉冲。 |
| 3. | The sense amplifier is used to amplify and output the voltage difference on the internal ; signal at the internal terminal
感测放大器则用来放大在内部端点上的内部信号电压差并且输出。 |
| 4. | The whole circuit includes memory array , decode , sense amplifier , data in - out circuit and pre - charge circuit
电路包括存储阵列、译码电路、敏感放大器、数据输入输出电路，预充电电路等部分。 |
| 5. | Second , a novel structure design of sense amplifier and address decoder applied in a 3 . 3v full - cmos 16kb sram is illustrated in detail
目前在计算机、通讯和消费类电子产品中的应用越来越广泛，越来越普遍。 |
| 6. | A capacitor - coupling differential logic circuit handling the output of a differential circuit using coupling capacitors and sense amplifier
一种电容耦合差动逻辑电路，其中主要是利用耦合电容以及感测放大器的作用，来处理一差动电路部份的输。 |
| 7. | Atd made the asynchronous use of sram . two - level sense amplifier amplifies the tiny voltage difference between the bit lines and enhances the anti - jamming ability
两级敏感放大器的应用在确保对位线微小电压差的放大的条件下，提高了抗干扰能力。 |
| 8. | In order to improve the performance of the sram , array partition , divided word line structure and cmos positive feedback sense amplifier are adopted
设计中采用了存储阵列划分、分级字线以及cmos正反馈差分读出放大器等先进技术，读写速度可达到20ns 。 |
| 9. | Some new technologies such as dividing the memory array into separated sub - arrays , atd , pre - charge and balance , subsection decoding , multilevel sense amplifier , etc have been used
设计中采用了诸如存储阵列分块技术，地址探测技术，预充电及平衡技术，分段译码技术，分级敏感放大器等一些新技术。 |
| 10. | This article firstly describes the structure and operational principle of a flash memory and analyzes the commonly used structures of its peripheral circuits . . . . . sense amplifier . then emphasizes on illustrating the design of two novel structures of sense amplifier applied in a 3v full - cmos flash memory , and then simulate them using innosis 0 . 15um process technology and obtain satisfying simulation results under different conditions
然后着重论述了两种应用3v全cmosflashmemory中的全新结构灵敏放大器，并用innosis0 . 15 m工艺，对其进行仿真，得到了不同条件下的仿真结果，结果表明新设计的全新灵敏放大器具有电路结构简单，读取速度快等优点，完全能够满足flashmemory的要求，达到了预期的目标。 |
